don't use aPLL in IDF version 3
seems that this interferes with MCLK routing
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@@ -225,6 +225,7 @@ class I2SSource : public AudioSource {
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#endif
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}
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#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0)
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if (mclkPin != I2S_PIN_NO_CHANGE) {
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_config.use_apll = true; // experimental - use aPLL clock source to improve sampling quality, and to avoid glitches.
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// //_config.fixed_mclk = 512 * _sampleRate;
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@@ -233,6 +234,7 @@ class I2SSource : public AudioSource {
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#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
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if (ESP.getChipRevision() == 0) _config.use_apll = false; // APLL is broken on ESP32 revision 0
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#endif
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#endif
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if (_i2sMaster == false) {
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DEBUG_PRINTLN(F("AR: Warning - i2S SLAVE mode is experimental!"));
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@@ -243,7 +245,10 @@ class I2SSource : public AudioSource {
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// Reserve the master clock pin if provided
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_mclkPin = mclkPin;
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if (mclkPin != I2S_PIN_NO_CHANGE) {
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if(!pinManager.allocatePin(mclkPin, true, PinOwner::UM_Audioreactive)) return;
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if(!pinManager.allocatePin(mclkPin, true, PinOwner::UM_Audioreactive)) {
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DEBUGSR_PRINTF("\nAR: Failed to allocate I2S pin: MCLK=%d\n", mclkPin);
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return;
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} else
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_routeMclk(mclkPin);
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}
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